CPU低端中端高端区分？英文双语对照

主频率,外频和二级缓存和FSB！这仨指数是最重要的。

·主频

主频也叫时钟频率，单位是MHz，用来表示CPU的运算速度。CPU的主频＝外频×倍频系数。很多人认为主频就决定着CPU的运行速度，这不仅是个片面的认识，而且对于服务器来讲，这个认识也出现了偏差。至今，没有一条确定的公式能够实现主频和实际的运算速度两者之间的量值关系，即使是两大处理器厂家 Intel和AMD，在这点上也存在着很大的争议，我们从Intel的产品的发展趋势，可以看出Intel很注重加强自身主频的发展。像其他的处理器生产厂家，有人曾经拿过一块1G的全美达来做比较，它的运行效率相当于2G的Intel处理器。

所以，CPU的主频与CPU实际的运算能力是没有直接关系的，主频表示在CPU内数字脉冲信号震荡的速度。在Intel的处理器产品中，我们也可以看到这样的例子：1 GHz Itanium芯片能够表现得差不多跟2.66 GHz Xeon/Opteron一样快，或是1.5 GHz Itanium 2大约跟4 GHz Xeon/Opteron一样快。CPU的运算速度还要看CPU的流水线的各方面的性能指标。

当然，主频和实际的运算速度是有关的，只能说主频是CPU性能表现的一个方面，而不能代表CPU的整体性能。

·外频

外频是CPU的基准频率，单位也是MHz。CPU的外频决定着整块主板的运行速度。说白了，在台式机中，我们所说的超频，都是超CPU的外频（当然一般情况下，CPU的倍频都是被锁住的）相信这点是很好理解的。但对于服务器CPU来讲，超频是绝对不允许的。前面说到CPU决定着主板的运行速度，两者是同步运行的，如果把服务器CPU超频了，改变了外频，会产生异步运行，（台式机很多主板都支持异步运行）这样会造成整个服务器系统的不稳定。

目前的绝大部分电脑系统中外频也是内存与主板之间的同步运行的速度，在这种方式下，可以理解为CPU的外频直接与内存相连通，实现两者间的同步运行状态。外频与前端总线(FSB)频率很容易被混为一谈，下面我们在前端总线的介绍中谈谈两者的区别。

缓存(Cache)大小是CPU的重要指标之一，其结构与大小对CPU速度的影响非常大。简单地讲，缓存就是用来存储一些常用或即将用到的数据或指令，当需要这些数据或指令的时候直接从缓存中读取，这样比到内存甚至硬盘中读取要快得多，能够大幅度提升CPU的处理速度。

缓存

所谓处理器缓存，通常指的是二级高速缓存，或外部高速缓存。即高速缓冲存储器，是位于CPU和主存储器DRAM(Dynamic RAM)之间的规模较小的但速度很高的存储器，通常由SRAM（静态随机存储器）组成。用来存放那些被CPU频繁使用的数据，以便使CPU不必依赖于速度较慢的DRAM（动态随机存储器）。L2高速缓存一直都属于速度极快而价格也相当昂贵的一类内存，称为SRAM(静态RAM)，SRAM(Static RAM)是静态存储器的英文缩写。由于SRAM采用了与制作CPU相同的半导体工艺，因此与动态存储器DRAM比较，SRAM的存取速度快，但体积较大，价格很高。

处理器缓存的基本思想是用少量的SRAM作为CPU与DRAM存储系统之间的缓冲区，即Cache系统。80486以及更高档微处理器的一个显著特点是处理器芯片内集成了SRAM作为Cache，由于这些Cache装在芯片内，因此称为片内Cache。486芯片内Cache的容量通常为8K。高档芯片如 Pentium为16KB，Power PC可达32KB。Pentium微处理器进一步改进片内Cache，采用数据和双通道Cache技术，相对而言，片内Cache的容量不大，但是非常灵活、方便，极大地提高了微处理器的性能。片内Cache也称为一级Cache。由于486，586等高档处理器的时钟频率很高，一旦出现一级Cache未命中的情况，性能将明显恶化。在这种情况下采用的办法是在处理器芯片之外再加Cache，称为二级Cache。二级Cache实际上是CPU和主存之间的真正缓冲。由于系统板上的响应时间远低于CPU的速度，如果没有二级Cache就不可能达到486，586等高档处理器的理想速度。二级Cache的容量通常应比一级Cache大一个数量级以上。在系统设置中，常要求用户确定二级Cache是否安装及尺寸大小等。二级Cache的大小一般为128KB、 256KB或512KB。在486以上档次的微机中，普遍采用256KB或512KB同步Cache。所谓同步是指Cache和CPU采用了相同的时钟周期，以相同的速度同步工作。相对于异步Cache，性能可提高30%以上。

目前，PC及其服务器系统的发展趋势之一是CPU主频越做越高，系统架构越做越先进，而主存DRAM的结构和存取时间改进较慢。因此，缓存（Cache）技术愈显重要，在PC系统中Cache越做越大。广大用户已把Cache做为评价和选购PC系统的一个重要指标。

·前端总线(FSB)频率

前端总线(FSB)频率(即总线频率)是直接影响CPU与内存直接数据交换速度。有一条公式可以计算，即数据带宽＝(总线频率×数据位宽)/8，数据传输最大带宽取决于所有同时传输的数据的宽度和传输频率。比方，现在的支持64位的至强Nocona，前端总线是800MHz，按照公式，它的数据传输最大带宽是6.4GB/秒。

外频与前端总线(FSB)频率的区别：前端总线的速度指的是数据传输的速度，外频是CPU与主板之间同步运行的速度。也就是说，100MHz外频特指数字脉冲信号在每秒钟震荡一千万次；而100MHz前端总线指的是每秒钟CPU可接受的数据传输量是 100MHz×64bit÷8bit/Byte=800MB/s。

其实现在“HyperTransport”构架的出现，让这种实际意义上的前端总线(FSB)频率发生了变化。之前我们知道IA-32架构必须有三大重要的构件：内存控制器Hub (MCH) ，I/O控制器Hub和PCI Hub，像Intel很典型的芯片组 Intel 7501、Intel7505芯片组，为双至强处理器量身定做的，它们所包含的MCH为CPU提供了频率为533MHz的前端总线，配合DDR内存，前端总线带宽可达到4.3GB/秒。但随着处理器性能不断提高同时给系统架构带来了很多问题。而“HyperTransport”构架不但解决了问题，而且更有效地提高了总线带宽，比方AMD Opteron处理器，灵活的HyperTransport I/O总线体系结构让它整合了内存控制器，使处理器不通过系统总线传给芯片组而直接和内存交换数据。这样的话，前端总线(FSB)频率在AMD Opteron处理器就不知道从何谈起了。

Advocate frequency, frequency and 2 class cache are mixed outside FSB! This three index is the most important.

·Advocate frequency

Advocate frequency also calls clock frequency, the unit is MHz, with the operation speed that will express CPU. Of CPU advocate times frequency of × of the frequency outside frequency ＝ coefficient. A lot of people recognize the traversal speed that gives priority to frequency to deciding CPU, this is an one-sided understanding not only, and will tell to the server, this understanding also appeared deviation. Up to now, affirmatory without formula can come true advocate frequency and effective operation rate are both the value of a quantity between concerns, even if Intel of manufacturer of two big processor and AMD, go up to also be put in the dispute with very big move in this bit, we the development trend of the product from Intel, can see Intel is paid attention to very much strengthen oneself advocate the development of frequency. Produce manufacturer like other processor, the Quan Meida that somebody once had taken a 1G will do quite, its moving efficiency is equivalent to the Intel processor of 2G.

So, of CPU advocate the operation capacity with frequency and practical CPU did not concern directly, advocate frequency shows the rate in concussion of signal of pulse of the number inside CPU. In the processor product of Intel, we also can see such case: Chip of 1 GHz Itanium can be behaved almost as fast as 2.66 GHz Xeon/Opteron, or it is 1.5 GHz Itanium 2 follows 4 GHz Xeon/Opteron about euqally fast. The operation speed of CPU views the function index of each respect of the automation line of CPU even.

Of course, advocate frequency and effective operation rate are concerned, can say only advocate a respect that frequency is CPU property performance, and the integral performance that cannot represent CPU.

·Outside frequency

Frequency is the fiducial frequency of CPU outside, the unit also is MHz. Of CPU outside frequency is deciding whole advocate board traversal speed. Spoken parts in an opera, in table machine, what we say exceed frequency, it is exceed CPU outside frequency (of course usually, the times frequency of CPU is be chained) believing this is nodded is very good understanding. But will tell to server CPU, exceeding frequency is absolutely unallowed. Respecting CPU is deciding in front advocate board traversal speed, both synchronism moves, if exceed server CPU frequency, the frequency outside was being changed, meeting generation asynchronous moves, (table chance is very much advocate board support asynchronous to move) what can create whole server system so is not stable.

Frequency of current China and foreign countries of majority computer system also is memory and advocate board the rate that the synchronism between runs, below this kind of means, understandable be CPU outside frequency connects with memory photograph directly, implementation is both the synchronous moving condition between. Outside frequency and front bus line (FSB) frequency is very easy by confuse sth with sth else, both distinction talks in the introduction that we carry bus line afore below.

Cache (one of main index that Cache) size is CPU, its structure and volume are very large to the influence of CPU speed. Tell simply, cache uses memory namely a few commonly used or the data that is about to use or instruction, read from inside cache directly when need these data or dictating take, compare memory so read in hard disk even take should get quickly much, can promote the processing of CPU rate substantially.

Cache

Alleged processor cache, what point to normally is cache of 2 class high speed, or cache of exterior high speed. Namely cache memory, it is to be located in CPU and advocate the dimensions between memory DRAM(Dynamic RAM) is lesser but the memory with very high rate, normally by SRAM (static state random memory) composition. With the data that will deposit those to be used often by CPU, so that make,CPU need not rely on the DRAM with slower rate (dynamic and random memory) . Cache of L2 high speed belongs to a kind of memory with speed is splitting and quite high also price all the time, call RAM) of SRAM(static state, SRAM(Static RAM) is the English abbreviate of static memory. Because SRAM used as same as the CPU that make semiconductor technology, because this and dynamic memory DRAM are compared, the access of SRAM rate is rapid, but volume is larger, the price is very high.

The basic idea of processor cache is to use a few SRAM regards CPU and DRAM storage system as the buffer between, namely Cache system. 80486 and a of more high-grade microprocessor marked characteristic is processor chip inside compositive SRAM serves as Cache, because these Cache outfit are inside chip, because this is called piece inside Cache. The capacity of the Cache inside 486 chip is 8K normally. High-grade chip is 16KB like Pentium, power PC can amount to 32KB. Pentium microprocessor is improved further piece inside Cache, use data and technology of double passageway Cache, relative to character, piece inside the size of Cache is not large, but very agile, convenient, improved the performance of microprocessor greatly. Piece inside Cache also calls one class Cache. As a result of 486, the 586 clock frequency that wait for high-grade processor are very tall, the circumstance that once appear,one class Cache did not hit the target, function will be apparently exasperate. The method that uses below this kind of circumstance is to be besides processor chip add Cache again, call 2 class Cache. 2 class Cache is CPU is mixed actually advocate keep the true cushion between. Because the noise on systematic board is in season far the speed under CPU, if do not have 2 class Cache,achieve impossibly 486, the 586 good rate that wait for high-grade processor. The capacity of 2 class Cache should compare one class Cache normally big above of an amount class. In systematic setting, constant requirement user decides whether 2 class Cache is installed reach dimension size to wait. The size of 2 class Cache is 128KB, 256KB or 512KB commonly. In the personal computer of 486 above class, use 256KB or 512KB synchronous Cache generally. Alleged synchronism is to show Cache and CPU used identical clock cycle, work with identical speed synchronism. Relative to Cache of Yu Yi pace, function can raise 30% above.

Current, one of development trends of PC and its server system are CPU advocate frequency does taller more, systematic framework does more advanced more, and advocate the structure that keeps DRAM and access time are improved slower. Accordingly, cache (Cache) it is important that the technology is shown more, in PC system Cache does bigger more. It is important that broad user already mixed Cache mixed Cache a of system of PC of choose and buy as the evaluation index.

·Front bus line (FSB) frequency

Front bus line (FSB) frequency (namely bus line frequency) it is immediate impact CPU and memory direct data exchanges rate. A formula can be calculated, namely data bandwidth ＝ (data of × of bus line frequency wide) / 8, number depends on according to transmitting the biggest bandwidth the width of all data that transmit at the same time and transmission frequency. For example, present support 64 to strong Nocona, front bus line is 800MHz, according to formula, its data transmits the biggest bandwidth is 6.4GB/ second.

Outside frequency and front bus line (the distinction of FSB) frequency: What the speed of front bus line points to is the speed that data transmits, frequency is outside CPU and advocate board between the rate that synchronism runs. That is to say, the frequency outside 100MHz refers in particular to digital pulse signal to be in per sec. concussion 10 million; And what 100MHz front bus line points to is the data with per sec. acceptability CPU transmission quantity is 8bit/Byte=800MB/s of ÷ of 100MHz × 64bit.

Its implementation is in " HyperTransport " of structural frame appear, the front bus line that allows this kind of real significance to go up (FSB) frequency produced change. We know IA-32 framework must have 3 before big important component part: Memory controller Hub (MCH) , i/O controller Hub and PCI Hub, resemble set of chip of the chip set Intel 7501 with very typical Intel, Intel7505, for Shuang Zhijiang processor measures what have something made to order personally, the MCH that they include offerred frequency to be the front bus line of 533MHz for CPU, cooperate DDR memory, bandwidth of front bus line can reach 4.3GB/ second. But rose to bring a lot of issues to systematic framework at the same time ceaselessly as processor function. And " HyperTransport " structural frame not only solved a problem, and raised bus line bandwidth effectively, processor of example AMD Opteron, architecture of agile HyperTransport I/O bus line makes it integrated memory controller, make processor does not pass a system to bus line sends chip troop and exchange data with memory directly. Such word, front bus line (FSB) frequency does not know to rise from He Tan in AMD Opteron processor.